bsncubed
6090ceb239
- aes67_ptp/ptp_hw.c: start the EMAC IEEE 1588 clock (IDF
ETH_MAC_ESP_CMD_PTP_ENABLE) and additionally enable snapshots for
PTP over UDP/IPv4 (IDF only enables PTP over Ethernet/L2). An RX hook
on the driver's info input path records {type, seq, sourcePortId, HW
timestamp} of port-319 PTPv2 event messages, then hands every frame to
lwIP unchanged.
- aes67_ptp.c: temporary 3.1 logger joins 224.0.1.129:319/320 and pairs
Sync HW RX timestamps with Follow_Up origin timestamps.
- Checked against linuxptp ptp4l (-4 -E -H, Intel igb) as GM: every Sync
has a HW timestamp; HW Sync intervals track the GM intervals with a
constant -39.8 us/s (+-0.3 us), i.e. local clock -39.8 ppm vs GM.
Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
aes67-ESP32-P4
AES67 sender for the Waveshare ESP32-P4-ETH (PoE): Spotify Connect and HLS/m3u8 streams out as an AES67 multicast stream, PTP-locked, with a simple web UI for settings and SDP export.
docs/aes67-core-base.md— reusable AES67 core design (PTP, RTP, SDP/SAP, VLAN, syslog, web UI contract)docs/hardware-and-design-notes.md— board details and project-specific designweb/index.html— web UI (served by the device)CLAUDE.md— working rules and build order
Status: design complete, firmware not started. See the build order in CLAUDE.md.