Files
aes67-ESP32-P4/partitions.csv
T
bsncubed bbfd3506bf Step 0: IDF project skeleton for esp32p4 with core component stubs
- Board checked with esptool: ESP32-P4 rev v1.3 (engineering silicon),
  32 MB GigaDevice flash. Rev <3 support and 32 MB set in sdkconfig.defaults.
- OTA partition layout: nvs, otadata, phy_init, ota_0/ota_1 (6 MB each,
  below 16 MB), coredump; no factory app. Partition table at 0x10000 so
  the bootloader can grow.
- App rollback enabled in the bootloader from the start.
- PROJECT_VER from git describe --tags --always --dirty.
- Empty stubs for the nine aes67_* core components; main logs version
  and chip revision.
- Built with ESP-IDF v5.5.5; not yet flashed.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
2026-09-24 22:47:21 +10:00

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CSV

# OTA layout: two app slots, no factory app. Fixed from step 0 on; do not change later.
# 32 MB flash, but app slots must stay below 16 MB (no cache mapping above it). 16-32 MB is free for data.
# Partition table at 0x10000 (not 0x8000) leaves the bootloader room to grow (0x2000-0x10000).
# NVS sits outside the app slots so config survives updates.
# Name, Type, SubType, Offset, Size
nvs, data, nvs, 0x11000, 0x6000
otadata, data, ota, 0x17000, 0x2000
phy_init, data, phy, 0x19000, 0x1000
ota_0, app, ota_0, 0x20000, 0x600000
ota_1, app, ota_1, 0x620000, 0x600000
coredump, data, coredump, 0xc20000, 0x10000