Files
aes67-ESP32-P4/main/main.c
T
bsncubed 3d05768f00 Step 4.1: /stream.sdp from the live config and PTP GM
- aes67_sdp_sap: aes67_sdp_build() builds the AES67 SDP (RFC 4566 +
  RFC 7273) with the same lines and order as the web UI preview;
  GET /stream.sdp serves it as application/sdp.
- aes67_ptp: public aes67_ptp_gm_id(), aes67_ptp_locked(),
  aes67_ptp_now_ns(). Clock IDs are now uppercase (RFC 7273 style), also
  in status.ptp, which the UI copies into ts-refclk.
- aes67_net: aes67_net_netif() returns the AES67 interface.
- Verified on board: /stream.sdp byte-identical to the UI's sdp() for
  the same config/status; mono, L16, ptime 0.333, ttl 8, clk_offset
  4294967295 and session_ver all follow the config.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
2026-09-25 06:38:55 +10:00

43 lines
1.2 KiB
C

#include "aes67_board.h"
#include "aes67_health.h"
#include "aes67_net.h"
#include "aes67_ota.h"
#include "aes67_ptp.h"
#include "aes67_sdp_sap.h"
#include "aes67_syslog.h"
#include "aes67_tx.h"
#include "aes67_web.h"
#include "esp_app_desc.h"
#include "esp_chip_info.h"
#include "esp_log.h"
#include "project_cfg.h"
static const char *TAG = "main";
void app_main(void)
{
const esp_app_desc_t *app = esp_app_get_description();
esp_chip_info_t chip;
esp_chip_info(&chip);
ESP_LOGI(TAG, "%s %s (IDF %s, built %s %s)",
app->project_name, app->version, app->idf_ver, app->date, app->time);
ESP_LOGI(TAG, "chip rev v%d.%d, %d cores",
chip.revision / 100, chip.revision % 100, chip.cores);
project_cfg_defaults();
esp_eth_handle_t eth;
ESP_ERROR_CHECK(aes67_board_eth_init(&eth));
ESP_ERROR_CHECK(aes67_net_init(eth));
ESP_ERROR_CHECK(aes67_health_init());
ESP_ERROR_CHECK(aes67_ptp_init());
ESP_ERROR_CHECK(aes67_ptp_start(eth));
ESP_ERROR_CHECK(aes67_tx_init());
ESP_ERROR_CHECK(aes67_syslog_init());
project_cfg_register();
ESP_ERROR_CHECK(aes67_ota_init());
ESP_ERROR_CHECK(aes67_sdp_sap_init());
ESP_ERROR_CHECK(aes67_web_start());
}