Files
aes67-ESP32-P4/sdkconfig.defaults
T
bsncubed 2a7ab7922d Step 7 prep: enable the 32 MB PSRAM
CONFIG_SPIRAM=y (hex mode, 200 MHz; 250 MHz needs chip rev >= 3).
malloc() places blocks above 16 KB in PSRAM, 32 KB internal RAM stays
reserved, DMA buffers remain internal. Needed for HLS segment buffers,
cspot and decoders.
Verified on board: psram_free 33,551,300 bytes, internal heap 463 KB,
PTP locked, AES67 stream unchanged (1000/s, no gaps, tone within 1 LSB).

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
2026-09-25 14:27:04 +10:00

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CONFIG_IDF_TARGET="esp32p4"
# OTA layout (partitions.csv): two app slots, no factory
CONFIG_PARTITION_TABLE_CUSTOM=y
CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions.csv"
# Bootloader had only 6% free below 0x8000; moved so it can grow (e.g. secure boot) without a relayout
CONFIG_PARTITION_TABLE_OFFSET=0x10000
# Rollback lives in the bootloader, which is only ever flashed over USB: enable it from the start
CONFIG_BOOTLOADER_APP_ROLLBACK_ENABLE=y
# Board has engineering silicon v1.3 (esptool chip_id). Rev <3 binaries don't run on rev 3 and vice versa.
CONFIG_ESP32P4_SELECTS_REV_LESS_V3=y
CONFIG_ESP32P4_REV_MIN_100=y
# 32 MB flash (esptool flash_id: GigaDevice c8/4019). App slots stay below 16 MB;
# cache mapping above 16 MB is experimental in IDF.
CONFIG_ESPTOOLPY_FLASHSIZE_32MB=y
# LLDP and PTP send raw frames from their own tasks next to lwIP: serialise EMAC transmits
CONFIG_ETH_TRANSMIT_MUTEX=y
# lwIP default is 10 sockets; PTP (2), AES67 TX, SAP, syslog and httpd's listen/control sockets
# use 7, leaving ~3 for web clients (httpd allows 7): a browser's keep-alive connections then
# starve new requests. 16 = 7 others + 7 web clients + OTA self-test client + 1 spare.
CONFIG_LWIP_MAX_SOCKETS=16
# 32 MB PSRAM in the P4 package (hex mode, 200 MHz; 250 MHz needs rev >= 3). Needed for step 7:
# HLS segment buffers, cspot, decoders. malloc() puts blocks >16 KB in PSRAM; DMA buffers stay internal.
CONFIG_SPIRAM=y