Step 0: IDF project skeleton for esp32p4 with core component stubs

- Board checked with esptool: ESP32-P4 rev v1.3 (engineering silicon),
  32 MB GigaDevice flash. Rev <3 support and 32 MB set in sdkconfig.defaults.
- OTA partition layout: nvs, otadata, phy_init, ota_0/ota_1 (6 MB each,
  below 16 MB), coredump; no factory app. Partition table at 0x10000 so
  the bootloader can grow.
- App rollback enabled in the bootloader from the start.
- PROJECT_VER from git describe --tags --always --dirty.
- Empty stubs for the nine aes67_* core components; main logs version
  and chip revision.
- Built with ESP-IDF v5.5.5; not yet flashed.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>

sdkconfig.defaults

@@ -0,0 +1,18 @@
+CONFIG_IDF_TARGET="esp32p4"
+
+# OTA layout (partitions.csv): two app slots, no factory
+CONFIG_PARTITION_TABLE_CUSTOM=y
+CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions.csv"
+# Bootloader had only 6% free below 0x8000; moved so it can grow (e.g. secure boot) without a relayout
+CONFIG_PARTITION_TABLE_OFFSET=0x10000
+
+# Rollback lives in the bootloader, which is only ever flashed over USB: enable it from the start
+CONFIG_BOOTLOADER_APP_ROLLBACK_ENABLE=y
+
+# Board has engineering silicon v1.3 (esptool chip_id). Rev <3 binaries don't run on rev 3 and vice versa.
+CONFIG_ESP32P4_SELECTS_REV_LESS_V3=y
+CONFIG_ESP32P4_REV_MIN_100=y
+
+# 32 MB flash (esptool flash_id: GigaDevice c8/4019). App slots stay below 16 MB;
+# cache mapping above 16 MB is experimental in IDF.
+CONFIG_ESPTOOLPY_FLASHSIZE_32MB=y