Step 0: IDF project skeleton for esp32p4 with core component stubs

- Board checked with esptool: ESP32-P4 rev v1.3 (engineering silicon),
  32 MB GigaDevice flash. Rev <3 support and 32 MB set in sdkconfig.defaults.
- OTA partition layout: nvs, otadata, phy_init, ota_0/ota_1 (6 MB each,
  below 16 MB), coredump; no factory app. Partition table at 0x10000 so
  the bootloader can grow.
- App rollback enabled in the bootloader from the start.
- PROJECT_VER from git describe --tags --always --dirty.
- Empty stubs for the nine aes67_* core components; main logs version
  and chip revision.
- Built with ESP-IDF v5.5.5; not yet flashed.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>

main/CMakeLists.txt

@@ -0,0 +1,3 @@
+idf_component_register(SRCS "main.c"
+                       INCLUDE_DIRS "."
+                       REQUIRES esp_app_format esp_hw_support)

main/main.c

@@ -0,0 +1,17 @@
+#include "esp_app_desc.h"
+#include "esp_chip_info.h"
+#include "esp_log.h"
+
+static const char *TAG = "main";
+
+void app_main(void)
+{
+    const esp_app_desc_t *app = esp_app_get_description();
+    esp_chip_info_t chip;
+    esp_chip_info(&chip);
+
+    ESP_LOGI(TAG, "%s %s (IDF %s, built %s %s)",
+             app->project_name, app->version, app->idf_ver, app->date, app->time);
+    ESP_LOGI(TAG, "chip rev v%d.%d, %d cores",
+             chip.revision / 100, chip.revision % 100, chip.cores);
+}