Step 3.1: EMAC hardware timestamps for PTP over UDP/IPv4

- aes67_ptp/ptp_hw.c: start the EMAC IEEE 1588 clock (IDF
  ETH_MAC_ESP_CMD_PTP_ENABLE) and additionally enable snapshots for
  PTP over UDP/IPv4 (IDF only enables PTP over Ethernet/L2). An RX hook
  on the driver's info input path records {type, seq, sourcePortId, HW
  timestamp} of port-319 PTPv2 event messages, then hands every frame to
  lwIP unchanged.
- aes67_ptp.c: temporary 3.1 logger joins 224.0.1.129:319/320 and pairs
  Sync HW RX timestamps with Follow_Up origin timestamps.
- Checked against linuxptp ptp4l (-4 -E -H, Intel igb) as GM: every Sync
  has a HW timestamp; HW Sync intervals track the GM intervals with a
  constant -39.8 us/s (+-0.3 us), i.e. local clock -39.8 ppm vs GM.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>

components/aes67_ptp/CMakeLists.txt

@@ -1,3 +1,4 @@
-idf_component_register(SRCS "aes67_ptp.c"
+idf_component_register(SRCS "aes67_ptp.c" "ptp_hw.c"
                        INCLUDE_DIRS "include"
-                       PRIV_REQUIRES aes67_web)
+                       REQUIRES esp_eth
+                       PRIV_REQUIRES aes67_web esp_netif lwip hal soc)