Step 1: Ethernet up (IP101/RMII), DHCP, link and IP logged

- aes67_board: Waveshare ESP32-P4-ETH pin profile and EMAC + IP101 driver
  install (PHY addr 1, reset GPIO51, ref clock in on GPIO50).
- aes67_net: Ethernet netif with DHCP client; logs link up/down (speed,
  duplex, MAC) and the DHCP lease.
- Verified on board: 100 Mbps full duplex, DHCP lease in ~8 s, ping
  0% loss, ~0.2 ms RTT.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>

components/aes67_board/CMakeLists.txt

@@ -1,2 +1,3 @@
 idf_component_register(SRCS "aes67_board.c"
-                       INCLUDE_DIRS "include")
+                       INCLUDE_DIRS "include"
+                       REQUIRES esp_eth)

components/aes67_board/aes67_board.c

@@ -1,7 +1,44 @@
 #include "aes67_board.h"
 
-// Stub (build step 0).
-esp_err_t aes67_board_init(void)
+#include "esp_eth.h"
+#include "esp_log.h"
+#include "boards/waveshare_esp32p4_eth.h"
+
+static const char *TAG = "board";
+
+esp_err_t aes67_board_eth_init(esp_eth_handle_t *out_eth)
 {
+    eth_mac_config_t mac_cfg = ETH_MAC_DEFAULT_CONFIG();
+    eth_esp32_emac_config_t emac_cfg = ETH_ESP32_EMAC_DEFAULT_CONFIG();
+    emac_cfg.smi_gpio.mdc_num = BOARD_ETH_MDC;
+    emac_cfg.smi_gpio.mdio_num = BOARD_ETH_MDIO;
+    emac_cfg.interface = EMAC_DATA_INTERFACE_RMII;
+    emac_cfg.clock_config.rmii.clock_mode = EMAC_CLK_EXT_IN;
+    emac_cfg.clock_config.rmii.clock_gpio = (emac_rmii_clock_gpio_t)BOARD_ETH_REF_CLK;
+    emac_cfg.emac_dataif_gpio.rmii.tx_en_num = BOARD_ETH_TX_EN;
+    emac_cfg.emac_dataif_gpio.rmii.txd0_num = BOARD_ETH_TXD0;
+    emac_cfg.emac_dataif_gpio.rmii.txd1_num = BOARD_ETH_TXD1;
+    emac_cfg.emac_dataif_gpio.rmii.crs_dv_num = BOARD_ETH_CRS_DV;
+    emac_cfg.emac_dataif_gpio.rmii.rxd0_num = BOARD_ETH_RXD0;
+    emac_cfg.emac_dataif_gpio.rmii.rxd1_num = BOARD_ETH_RXD1;
+
+    eth_phy_config_t phy_cfg = ETH_PHY_DEFAULT_CONFIG();
+    phy_cfg.phy_addr = BOARD_ETH_PHY_ADDR;
+    phy_cfg.reset_gpio_num = BOARD_ETH_PHY_RST;
+
+    esp_eth_mac_t *mac = esp_eth_mac_new_esp32(&emac_cfg, &mac_cfg);
+    esp_eth_phy_t *phy = esp_eth_phy_new_ip101(&phy_cfg);
+    if (!mac || !phy) {
+        ESP_LOGE(TAG, "EMAC/PHY create failed");
+        return ESP_FAIL;
+    }
+
+    esp_eth_config_t eth_cfg = ETH_DEFAULT_CONFIG(mac, phy);
+    esp_err_t err = esp_eth_driver_install(&eth_cfg, out_eth);
+    if (err != ESP_OK) {
+        ESP_LOGE(TAG, "driver install failed: %s", esp_err_to_name(err));
+        return err;
+    }
+    ESP_LOGI(TAG, "%s: IP101 at PHY addr %d, RMII", BOARD_NAME, BOARD_ETH_PHY_ADDR);
     return ESP_OK;
 }

components/aes67_board/include/aes67_board.h

@@ -3,5 +3,7 @@
 #pragma once
 
 #include "esp_err.h"
+#include "esp_eth_driver.h"
 
-esp_err_t aes67_board_init(void);
+// Create and install the Ethernet driver (EMAC + PHY) for this board. Does not start it.
+esp_err_t aes67_board_eth_init(esp_eth_handle_t *out_eth);

components/aes67_board/include/boards/waveshare_esp32p4_eth.h

@@ -0,0 +1,17 @@
+// Waveshare ESP32-P4-ETH (PoE): pin profile.
+// IP101GRI PHY over RMII, 50 MHz ref clock from the PHY into the EMAC.
+#pragma once
+
+#define BOARD_NAME          "Waveshare ESP32-P4-ETH"
+
+#define BOARD_ETH_PHY_ADDR  1
+#define BOARD_ETH_PHY_RST   51      // PHY reset/power
+#define BOARD_ETH_MDC       31
+#define BOARD_ETH_MDIO      52
+#define BOARD_ETH_REF_CLK   50      // EMAC_CLK_EXT_IN
+#define BOARD_ETH_TX_EN     49
+#define BOARD_ETH_TXD0      34
+#define BOARD_ETH_TXD1      35
+#define BOARD_ETH_CRS_DV    28
+#define BOARD_ETH_RXD0      29
+#define BOARD_ETH_RXD1      30